1. Technical Field
Embodiments of the present invention generally relate to a driver of a semiconductor memory device, and more particularly to a technology for reducing consumption of a leakage current not required for a driver circuit of a semiconductor memory device.
2. Related Art
Generally, according to a memory unit of a dynamic random access memory (DRAM), a plurality of unit cells, each of which has one transistor and one capacitor, is configured in the form of a matrix in a manner that the unit cells are arranged in a plurality of rows and a plurality of columns.
In addition, the semiconductor memory device includes a memory array, a row decoder, a column decoder, a sense amplifier, and pairs of input/output (I/O) lines. A memory array includes a plurality of memory cells, and a plurality of word lines and pairs of bit lines are coupled to the memory cells. Pairs of bit lines and pairs of I/O lines are coupled to the sense amplifier. In addition, the pairs of I/O lines are controlled by a plurality of column selection lines so as to be electrically coupled to the sense amplifier.
A row decoder decodes a row address received from an external part so as to select some of word lines, and a column decoder decodes a column address received from an external part so as to select some of column selection lines. In addition, the row decoder includes drivers for driving a plurality of word lines in an output end, and the column decoder includes drivers for driving a plurality of column selection lines in an output end.
Specifically, each MOS transistor contained in each of the row decoder and the column decoder of the semiconductor memory device configured to use a low power-supply voltage has a very small gate width, such that a leakage current occurs even when there is a small voltage difference between a source and a drain of each MOS transistor in a standby mode of the row decoder and the column decoder.
The small amount of a leakage current occurs in the MOS transistors, such that it does not greatly affect power consumption of the semiconductor memory device when a small number of row decoders and a small number of column decoders are used. However, with the increasing integration degree of the semiconductor memory device, the number of row decoders and the number of column decoders are rapidly increased in proportion to the increasing integration degree of the semiconductor memory device. Specifically, if the number of row decoders and the number of column decoders are increased, the amount of leakage current is also increased such that total power consumption of the semiconductor memory device is also increased.
In order to reduce the amount of leakage current of the decoder, the related art has widely used a method for blocking a power source of a transistor. However, there is needed a much larger-sized driver for facilitating supply of a power source. The higher the frequency, the larger the number of transistors to be driven, so that the related art may have difficulty in achieving smooth power supply. In addition, if a leakage current of the driver is increased, a direct current (DC) failure occurs, resulting in reduction of productivity.
In recent times, systems configured to use semiconductor memory devices have been rapidly developed to have smaller sizes and lower power consumption. Therefore, it is impossible for high power-consumption semiconductor memory devices to be used for small-sized or portable-sized systems, such that commercial viability thereof is greatly decreased. Especially, a leakage current encountered in products (such as mobile phones) that have low power-consumption as important elements for high product competitiveness is directly associated with such product competitiveness.